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FAN8001D
5-Channel Motor Driver
Features
* * * * * * 1 phase, full-wave, linear DC motor driver Built-in TSD (Thermal shutdown) circuit Built-in 5V regulator (With an external PNP TR) Built-in mute circuit Built-in loading motor speed control circuit Wide operating supply voltage range: 6V~13.2V
Description
The FAN8001D is a monolithic integrated circuit, suitable for 5-ch motor driver which drives focus actuator, tracking actuator, sled motor, spindle motor and loading motor of CD system.
28-SSOPH-375
Target Applications
* * * * Compact disk player (CDP) Video compact disk player (VCD) Automotive compact disk player (CDP) Other compact disk media
Ordering Information
Device FAN8001BD FAN8001BDTF Package 28-SSOPH-375 28-SSOPH-375 Operating Temp. -25C ~ +75C -25C ~ +75C
Rev. 1.0.1 February. 2000.
(c)2000 Fairchild Semiconductor International
1
FAN8001D
Pin Assignments
LD CTL DO3.2 DO3.1 DO5.2 DO4.2 DO4.2 GND3 VREF VCC2 FIN (GND) DO5.1 15 14 DI5.2 VCC1
DI4.2
DI4.1
28
27
26
25
24
23
22
21
20
19
DI3
18
17
16
FAN8001D
1 DO1.1
2 DO1.2
3 DI1.1
4 DI1.2
5 REB
6 REO
7 MUTE FIN (GND)
8 GND1
9 DI5.1
10 DI2
11 DO2.1
12 DO2.2
13 GND2
Pin Definitions
Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Pin Name DO1.1 DO1.2 DI1.1 DI1.2 REB REO MUTE GND1 DI5.1 DI2 DO2.1 DO2.2 GND2 DI5.2 DO5.1 DO5.2 DO3.1 DO3.2 DI3 LD CTL VCC1 VCC2 VREF DI4.1 I/O O O I I O O I I I O O I O O O O I I I I Focus output 1 (-) Focus output 2 (+) Focus input 1 Focus input 2 (Adjustable) Regulator base Regulator output, 5V Mute Ground 1 Loading input 1 Spindle input 2 Spindle output (+) Spindle output (-) Ground 2 Loading input 2 Loading output 1(+) Loading output 2(-) Sled output (-) Sled output (+) Sled input Loading motor speed control Supply voltage 1 Supply voltage 2 2.5V bias Tracking input 1 (Adjustable) Pin Function Description
2
FAN8001D
Pin Definitions (Continued)
Pin Number 25 26 27 28 Pin Name DI4.2 DO4.1 DO4.2 GND3 I/O I O O Tracking input 2 Tracking output 1 (+) Tracking output 2 (-) Ground 3 Pin Function Description
Internal Block Diagram
LD CTL DO4.2 DO4.1 DO3.2 DO3.1 DO5.2 16 - Level shift VCC2 VCC1 DI4.2 DI4.1 DI3 FIN (GND) DO5.1 15 + 14 DI5.2 - GND3 VREF 23
28
27
26
25 10k
24
22
21
20
19
18
17
10k - + 10k TSD - + - Level shift +
- Level shift - +
+ 10k
- 10k + 10k -
2.5V Regulator Mute + 50k 10k 10k 10k + 50k 10k
Level shift -
1 DO1.1
2 DO1.2
3 DI1.1
4 DI1.2
5 REB
6 REO
7 MUTE FIN (GND)
8 GND1
9 DI5.1
10 DI2
11 DO2.1
+
Level shift -
12 DO2.2
13 GND2
3
+ - +
COMP
FAN8001D
Equivalent Circuits
Driver input (Except for loading motor driver) Driver output
2.5V 10k
10k 1 2 11 12 15
16 17 18 27 26 20k
10 3 25 19
4 24
0.58k VREF1
Loading motor driver input
Loading motor speed control input
9
14 50k 50k 50k 50k 50k 20 50k
50k 50k
50k
50k
50k
50k
50k
50k
Mute input
Bias input
50k 50k 7 23
50k
4
FAN8001D
Absolute Maximum Ratings (Ta = 25C)
Parameter Maximum supply voltage Power dissipation Operating temperature Storage temperature Maximum current output Symbol VCC MAX PD TOPR TSTG IOMAX Value 18 1.7
note
Unit V W C C A
-25 ~ +75 -55 ~ +150 1
NOTE: 1. When mounted on 76mm x 114mm x 1.57mm PCB (Phenolic resin material). 2. Power dissipation reduces 13.6mW / C for using above Ta=25C 3. Do not exceed Pd and SOA (Safe Operating Area).
Power Dissipation Curve
Pd (mW) 3,000 2,000
1,000 0
0
25
50
75
100
125
150
175
Ambient temperature, Ta [C]
Recommended Operating Condition (Ta = 25C)
Parameter Operating supply voltage Symbol VCC Value 6 ~ 13.2 Unit V
5
FAN8001D
Electrical Characteristics
(Ta=25C, VCC=8V, RL=8, f=1kHz, unless otherwise specified) Parameter Quiescent circuit current Mute-on current Mute-on voltage Mute-off voltage REGULATOR PART Output voltage Load regulation Line regulation Input offset voltage Output offset voltage 1 Maximum source current 1 Maximum sink current 1 Maximum output voltage 1 Maximum output voltage 2 Closed-loop voltage gain Ripple rejection ratio Slew rate VREG VRL3 VCC VIO VOO1 ISOURCE1 RL=8VCC ISINK1 VOM1 VOM2 AVF RR SR RL=8GND VIN=0.7V VIN=7V VIN=0.1VRMS VIN=0.1VRMS, f=120Hz 120Hz, VIN=1VRMS, Square wave VPIN9=5V, VPIN14=0V, RL=45 VPIN9=0V, VPIN14=5V, RL=45 VCTL=3.54.5V, VPIN9=5V VPIN14=0V, RL=45 VCTL=3.54.5V, VPIN9=0V VPIN14=5V, RL=45 IL=100400mA, VPIN9=5V, VPIN14=0V IL=100400mA, VPIN9=0V, VPIN14=5V VPIN9=5V, VPIN14=5V VPIN9=0V, VPIN14=0V IL=100mA IL=0200mA VCC=613V, IL=100mA 4.7 -50 -20 -15 -40 0.25 0.25 2.5 10 40 1 5.0 0 0 0.4 0.4 3.3 -4.5 12 60 2 5.3 50 80 15 40 -3.7 14 V mV mV mV mV A A V V dB dB V / s Symbol ICCQ IMUTE VMON VMOFF Conditions Under no-load Pin 7=GND Min. 2.5 2 Typ. 6 2.5 Max. 10 5 0.5 Units mA mA V V
DRIVER PART (Except for loading motor driver)
LOADING MOTOR DRIVER PART (Unless otherwise specified, VCTL=opened) Output voltage 1 Output voltage 2 Output voltage regulation 1 (CTL) Output voltage regulation 2 (CTL) Load regulation 1 Load regulation 2 Output offset voltage 2 Output offset voltage 3 VO1 VO2 VOCTL1 VOCTL2 VRL1 VRL2 VOO2 VOO3 2.5 2.5 0.5 0.5 -40 -40 3.1 3.1 1.0 1.0 300 300 3.8 3.8 1.5 1.5 700 700 40 40 V V V V mV mV mV mV
6
FAN8001D
Application Information
1. MUTE
Pin #7 High Low
Mute circuit Turn-off Turn-on
7
Output driver bias
* When the mute pin #7 is open or the voltage of the mute pin #7 is below 0.5V, the mute circuit is activated so that the output circuit will be muted. * When the voltage of the mute pin is above 2V, the mute circuit is stopped and the output circuit is operated normally. * If the chip temperature rises above 175C, then the TSD (Thermal shutdown) circuit is activated and the output circuit is muted.
2. TSD (THERMAL SHUTDOWN)
VREF BG Output driver bias
R11
Q11 R12
* The VREF BG is the output voltage of the band-gap-referenced biasing circuit and acts as the input voltage of the TSD circuit. * The base-emitter voltage of the TR, Q11 is designed to turn-on at below voltage. VBE = VREF BG x R12 / (R11+R12) = 400mV * When the chip temperature rises up to 175C, then the turn-on voltage of the Q11 would drop down to 400mV. Hence, the Q11 would turn on so the output circuit will be muted.
7
FAN8001D
3. REGULATOR
5 I VREF BG D1 R1 D2 R3 CE 100F - + R2 6 KSB772 VOUT (5V) +
* The VREF BG is the output voltage of the band-gap-referenced biasing circuit and is the reference voltage of the regulator. * The external circuit is composed of the transistor, KSB772 and a capacitor, 100F, and the capacitor is used as a ripple filter and should have a good temperature characteristics. * The output voltage, VOUT is determined as follows. VOUT = VREF BG x 2 = 2.5 x 2 = 5V (R2 = R3) R2 = R3 4. LOADING MOTOR DRIVER
20 +V COMP 9 14 + -
I + R VREF1 15 -V I + R VREF1 - Buffer Q3 - Buffer Q1 -V M 16 Q4 +V
Q2
* The input voltages of (5V and 0V) or (0V and 5V) pairs are applied to the input pin #9 and #14 respectively. * When the input voltages are applied to the input pin #9 and #14, then the output of the comparator is decided depends on the input voltage status. * As shown in the above diagram, the difference V, [VREF1 + (I x R)] - [VREF1 -(I x R)], is applied to the both terminals of the motor. The direction of the motor is decided by the voltage difference, +V and -V. * The output characteristics is as follows, - If pin # 9=5V and #14=0V, then pin # 15=+V and #16= -V, hence the motor turn in forward direction. - If pin # 9=0V and #14=5V, then pin # 15= -V and #16=+V, hence the motor turn in reverse direction. - If pin # 9=5V and #14=5V, then V=0V, hence the motor stop. - If pin # 9=0V and #14=0V, then V=0V, hence the motor stop. * When the rotation speed control of the loading motor is desired, refer to the follows.
8
FAN8001D
5. LOADING MOTOR SPEED CONTROL
VCC (8V) 50k 20 4V 50k
VCC
VCC (8V) 50k 20 4V
VCC
R
R
50k
D
* * * *
If the torque of the loading motor is too low with the pin #20 open, then use it as the above diagram. The desired torque could be obtained by selecting the appropriate resistor R as shown in the left diagram. If it is necessary, the zener diode can be used as in the right diagram. The maximum torque is obtained when the applied voltage at pin #20 is about 6.8V (at VCC=8V).
6. DRIVER (EXCEPT FOR LOADING MOTOR DRIVER)
VREF (2.5V) 3 10
+ -
AMP Level shift
-I
+ -
Buffer Q1 -V M 1 2 12 18 26 Q4 +V
Q2
19 25 10k 4 24 100k 10k +I + - Buffer Q3
11 17 27
* The voltage, VREF, is the reference voltage given by the bias voltage of the pin #23. * The input signal through the pin #3 is amplified by 10k/10k times and then fed to the level shift. * The level shift produces the current due to the difference between the input signal and the arbitrary reference signal. The current produced as +I and -I is fed into the driver buffer. * Driver Buffer operates the power TR of the output stage according to the state of the input signal. * The output stage is the BTL Driver and the motor is rotating in forward direction by operating TR Q1 and TR Q4. On the other hand, if TR Q2 and TR Q3 is operating, the motor is rotating in reverse direction. * When the input voltage through the pin #3 is below the VREF, the motor rotates forward direction. * When the input voltage through the pin #3 is above the VREF, the motor rotates reverse direction. * If it is desired to change the gain, then the pin #4 or #24 can be used.
9
FAN8001D
7. When the bias voltage of the pin #23 is below 1.4V, then the output circuit will be muted. Hence for the normal operation, the bias voltage should be used in 1.6V~6.5V. 8. Connect a by-pass capacitor, 0.1F between the supply voltage source.
VCC2 22 VCC1 21 104
9. Radiation fin is connecting to the internal GND of the package. Connect the fin to the external GND.
10
FAN8001D
Typical Perfomance Chracteristics
VCC vs ICC
16 14 12 ICC [mA] 10 8 6 4 2 0 4 6 8 12 14 16 16 16 18 VCC [V] Imuite [mA] 7 6 5 4 3 2 1 0 4 6 8 10 12 14 16 18 20 VCC [V]
VCC vs Imute
VCC=vari pin23=2.5
Vcc =va ri
VCC vs Isou
90 80 70 Isio [mA] Isio [mA] 60 50 40 30 20 4 6 8 10 VCC [V] 12 14 16 1000 900 800 700 600 500 400 300 4 6
VCC vs Isink
VCC=vari pin23=2.5 RL=8
VCC=vari pin23=2.5 RL=8
8 10 VCC [V] 12 14 16
VCC vs Vreg
6.0 5.5 5.0 Vreg [V] 4.5 4.0 3.5 3.0 3 5 7 9 VCC [V] 11 13 15 VCC=vari pin23=2.5 RL=8 2.5 2.0 4 6 Vreg [V] 4.5 4.0 3.5 3.0
VCC vs Vom
VCC=vari pin23=2.5
8
10 VCC [V]
12
14
16
11
FAN8001D
Test Circuits
SW13 8 SW12
3 2 1
VCC 8 SW14 8 3 2 1 VCC 8 3 2 1 VCC 28 27 26 25 24 23 22 21 20 19 18 17 16 15 8 SW21 3 8 SW19 TRACKING ~ 10F Ripple ~ 100F + 2+ + 1 SW17 2.5V 2 3 20 3 SW16 2+ 10F 1 SW15 IL 8 1 VCC 45 SW11 3 2 SW20 VCC 8 CTL SLED ~ SW9 VCC 1 3 2 1 VCC SW10 3 2
1 SW18
GND3 DO4.2 DO4.1 DI4.2 DI4.1 VREF VCC2
VCC1 LD ctl DI3
DO3.2 DO3.1 DO5.2 DO5.1
FAN8001D
DO1.1 DO1.2 DI1.1 DI1.2 REB 1 VCC 1 2 8 3 8 +2 + VCC SW3 1 2 3 8 8 3 SW2 ~ Focus IL 100F Spindle Loading forwaed SW1 SW4 1 2 3 4 5 REO 6 VCC VCC Mute 1 SW5 +2 SW7 8 8 VCC SW6 SW8 1 2 1 2 3 Loading reverse MUTE 7 GND 8 DI5.1 DI2 9 10 DO2.1 DO2.2 GND2 DI5.2 11 12 13 14
3 KSB772
3
~
12
FAN8001D
Application Circuits
SERVO PRE-AMP
CONTROLLER
FOUCS
TRACKING
BIAS
SLED
SPINDLE
CONTROL
FORWARD
REVERSE
TRACKING ACTUATOR
VCC
SLED MOTOR M
LOADING MOTOR M
102
28
27
26
25
24
23
22
21
20
19
18
17
16
15
GND3 DO4.2 DO4.1 DI4.2
DI4.1 VREF VCC2
VCC1 LD ctl
DI3 DO3.2 DO3.1 DO5.2 DO5.1
FAN8001D
DO1.1 DO1.2 DI1.1 DI1.2 1 2 3 4 REB 5 REO 6 VCC MUTE 7 GND 8 DI5.1 9 DI2 10 DO2.1 DO2.2 GND2 DI5.2 11 12 13 14
KSB772 FOCUS ACTUATOR 100F
5V out +
M MUTE Low: ON High: OFF SPINDLE MOTOR
13
FAN8001D
DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR INTERNATIONAL. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.
www.fairchildsemi.com 12/1/00 0.0m 001 Stock#DSxxxxxxxx 2000 Fairchild Semiconductor International
2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.


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